This invention relates to an interlock, lockout, or priority circuit; or more particularly to a racing circuit which may select one of a number of request signals generated asychronously by a plurality of processor units requesting the use of a common unit, thereby permitting the exclusive use of the common unit by one processor unit.
There are a number of situations in which one common unit is provided for servicing a number of other processing or peripheral units. In the telephone systems, one example is a translator serving a number of registers. In computer systems, a central processor may be arranged to accept input data from several peripheral units or terminals. Another example is a common bus or line onto which only one unit at a time is allowed to send signals. In general, each of the peripheral processing units is provided with means to generate a service request signal whenever it is ready to use the common unit. Several different arrangements have been used over the years for the common unit to recognize a service request and become associated with the calling unit for a period of time, while preventing requests from other units from interfering. One approach is to simply scan the service request leads, either continuously, or whenever at least one unit has an active request signal present. With other arrangements, as soon as an active request is present from one unit it is extended to the common processor, and the circuits are interconnected in a manner which blocks any request signals from other units being extended. These are known as interlock, lockout, or priority circuits. Often the active request signals become latched until a release or reset signal is received. Some examples of priority circuits are U.S. Pat. No. 3,581,108 to Eisenmengler for a Single Selecting Circuit Employing a Plurality of Interlocked Nor Gates, U.S. Pat. No. 4,189,766 to Homguchi et al for a Racing Circuit for Controlling Access of a Processor Units to a Common Device, and U.S. Pat. No. 3,772,651 to Thyssens for a Lock-Out Circuit.